Triple channel memory

TP-Oreilly

In Runtime
Messages
240
Hi, I have ocz triple channel ddr3 1600mhz ram.

Everest tells me my real clock is 800mhz and my effective clock 1600mhz.

Ive read somewhere before that in triple channel, my real clock should be 533, and that it is tripled because it is in triple channel, which brings the effective clock upto roughly 1600mhz, is this right, should my real clock be 800mhz or 533 mhz?
 

Remeniz

Fully Optimized
Messages
3,390
Location
England
Hi, I have ocz triple channel ddr3 1600mhz ram.

Everest tells me my real clock is 800mhz and my effective clock 1600mhz.

Ive read somewhere before that in triple channel, my real clock should be 533, and that it is tripled because it is in triple channel, which brings the effective clock upto roughly 1600mhz, is this right, should my real clock be 800mhz or 533 mhz?
It's a little confusing but dont mix DDR speeds with the amount of channel links. The RAM clock speed is it's operating speed and the channels simply refer to "how many simultaneous communication links" there are from the RAM controller to the RAM itself.

Your running DDR2 RAM and that's the clue right there. DDR2 = Double Data Rate and means that read/writes are done on the positive going and negative going clock pulses. So Everest is correct to state a RAM speed of 800Mhz, double this and you get 1600Mhz.
 

Remeniz

Fully Optimized
Messages
3,390
Location
England
My bad. It was early in the morning :D

But yea DDR3 benefits are data transfer rates at roughly double that of DDR2 and larger capacity modules and the same applies; The 'DDR' part is Double Data Rate and the number after that is just the 'version' denoting the improvement of RAM technology. So regardless of RAM version it's still 'Double Data Rate' meaning double transfer speeds on each clock cycle.

Hence 800Mhz = 1600Mhz DDR.

The amount of channel links from RAM <> CPU is a different topic.

Staying on subject though it would be interesting seeing TDR(Triple Data Rate) or QDR(Quad Data Rate) or even VDR(Variable Data Rate) RAM. But this would involve complex clock waveforms.
 
Top