Bulldozer requires AM3+ socket

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Puddle Jumper

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Advanced Micro Devices said that its next-generation desktop processors code-named Zambezi will use socket AM3+ platforms, which will be backwards compatible with the firm's existing AM3 products. While the latter is an advantage for the platform, it may be a disadvantage for eight-core processors based on Bulldozer micro-architecture.

"The existing G34 and C32 server infrastructure will support the new Bulldozer-based server products. In order for AMD's desktop offering to fully leverage the capabilities of Bulldozer, an enhanced AM3+ socket will be introduced that supports Bulldozer and is backward-compatible with our existing AM3 CPU offerings," an official from AMD said in an interview with Planet3DNow web-site.

Apparently, it was possible for AMD to make Bulldozer microprocessors compatible with existing AM3+ infrastructure, but in order to do that, the company would have to sacrifice certain important features of the new core.

"When we initially set out on the path to Bulldozer we were hoping for AM3 compatibility, but further along the process we realized that we had a choice to make based on some of the features that we wanted to bring with Bulldozer. We could either provide AM3 support and lose some of the capabilities of the new Bulldozer architecture or, we could choose the AM3+ socket which would allow the Bulldozer-base Zambezi to have greater performance and capability," the official said.

The compatibility with older microprocessors allows AMD to simplify transition to the new micro-architecture and process design since the new AM3+ platform will support inexpensive chips from day one. However, such compatibility also means that AMD Zambezi processors will only support dual-channel memory controller. Considering the fact that all modern high-end Intel Core i7 processors with up to six cores feature triple-channel memory controller, it is unclear how AMD plans to "feed" eight cores of Zambezi with dul-channel DDR3 without creating bottlenecks.

AMD Bulldozer-based processor code-named Zambezi will have up to eight cores along with a new TurboCore dynamic acceleration technology. Thanks to the new micro-architecture the chip promises to be faster than existing AMD products.

Source: Desktop Bulldozer Processors Will Require New Platforms - AMD - X-bit labs

Basically you can use AM3 processors in a AM3+ socket but you cannot use a AM3+ cpu in a AM3 socket. This also means Bulldozer will be dual channel DDR3 which may be a problem seeing as lga2011 Sandy bridge processors are rumored to have Quad channel memory.

I'm glad I didn't jump on the AM3 bandwagon since the platform will be so short lived.
 
I definitely wouldn't call it "short lived". it isn't going to just roll over and die. :D AM3 will continue to be the main market for AMD for quite a while yet as Bulldozer will be high end stuff.

It's too early to make the call that it will only be dual channel, though. AM3 chips will be, but AM3+ could very well be quad channel. It will be interesting to sit back and see what develops. ;)
 
I definitely wouldn't call it "short lived". it isn't going to just roll over and die. :D AM3 will continue to be the main market for AMD for quite a while yet as Bulldozer will be high end stuff.

It's too early to make the call that it will only be dual channel, though. AM3 chips will be, but AM3+ could very well be quad channel. It will be interesting to sit back and see what develops. ;)

That depends on you definition of high end. :) The mainstream Sandy Bridge parts are supposed to be very reasonably priced and since they are ~10% faster than Nehalem clock for clock the only way AMD could compete with them is using Bulldozer based parts.

The article is the one that made the conclusion that bulldozer will be dual channel which (I think) is consistent with some road maps amd has released in the past. Also it's possible that keeping dual channel memory is a necessary part of preserving compatibility with AM3 chips.
 
Yeah when bulldozer comes out AM3 will be dead. Dunno why AMD is keeping backwards compatibility, if they are hoping for the budget market thats a silly way to do it. Older Intel chips and AMDs own budget line will be cheap enough not to warrant a consideration. They need to get off dual channel, it's 2010 that's old hat.
 
I knew it was to good to be true. You can't keep offering improvements without changing the socket design every now and then. And I don't understand why they didn't update the memory system when there adding more cpu cores, it sounds like they've bottlenecked the system right off the bat.
 
You don't see triple channel memory giving the i7's much on desktop systems in terms of performance though. That's why socket 1156 chips tend to keep up.

For server usage more memory performance tends to help a lot more than on a desktop system. Socket 1366 was originally developed for servers.
I guess Intel just wanted to get i7's out the door with 1366 before 1156 was ready.
 
You don't see triple channel memory giving the i7's much on desktop systems in terms of performance though. That's why socket 1156 chips tend to keep up.

I read an article addressing that issue back when lynfield was released and I believe the explanation was that the extra memory bandwidth wasn't necessary for quad cores however when you started adding more cores it became more of a bottleneck. Since lga1366 is Intel's high end platform they went with triple channel in anticipation of releasing 6+ core processors.

Because Bulldozer will have much more than 4 cores dual channel memory could become much more of a bottleneck than we have seen so far.

You don't see triple channel memory giving the i7's much on desktop systems in terms of performance though. That's why socket 1156 chips tend to keep up.

Intel hasn't hidden the fact that they started integrating the server and enthusiast platforms with nehalem and plan to do so with sandy bridge as well.
 
I read an article addressing that issue back when lynfield was released and I believe the explanation was that the extra memory bandwidth wasn't necessary for quad cores however when you started adding more cores it became more of a bottleneck. Since lga1366 is Intel's high end platform they went with triple channel in anticipation of releasing 6+ core processors.

Because Bulldozer will have much more than 4 cores dual channel memory could become much more of a bottleneck than we have seen so far.
Memory bandwidth (and memory latency) basically has to be enough to saturate the cores with instructions as long as there are instructions to process. If the cores are already saturated, faster memory won't really provide a benefit.

It also depends on the type of workload and how much memory access it requires. Server applications tend to rely more on large amounts of memory access. Not to mention some types of work being more predictable than others in terms of prefetching - the less predictable, the more it will have to access memory when the prefetchers are wrong; though latencies tend to be more important here.

Anyway, for desktop systems Thuban generally does pretty well with low latency DDR3-1333 in dual channel. It hardly benefits from using much more than about DDR3-1600; lower latencies tend to have more effect.
If DDR3-1600 is used as standard with Zambei, I think it will be more than enough for most desktop type usage. I would guess DDR3-2000 kits would provide a little benefit, but not much - those who like to squeeze every drop of performance will buy DDR3-2000 for those few ms more in SuperPi or for those few extra 3dmark points, but not something regular users will bother with or notice.
 
The cores aren't saturated though. Actually the more cores/threads you add to a cpu the more difficult good memory management gets. CPUs by nature have loose memory management rules, when you create more core/threads they will fight over the available memory and attrition will occur. This can happen when there is even free memory ripe for the taking. In an i7 you can have as much as 30% memory "attrition" or bandwidth lost to the cpu fighting itself. Without changing the way cpus manage memory (which has issues of its own) the only way to offset this is to make the memory fast by raising the clock, lowering the timing or adding more channels. capacitors cant work as fast as transistors so adding more channels is easier and doesn't push the hardware as much. You may not see the problems in everyday usage with a 4 or even 6 core cpu, but as we get more and more parallel it will crop up. it already is in server and research applications and high end gaming machines could benefit from it. The point in speeding the memory up now is 2 fold 1: for Intel it spreads dev costs since server and desktop cpus are so closely related and 2: its a lot easier to start working on it now and make incremental advancements than to cram it in at the last minute.
 
But is it bandwidth or latencies that causes the largest wait?
Based on testing, it seems to be latencies. Just ask chew*

I mean, when a core needs data it hasn't got, it needs to make a request, then the memory takes X clock cycles to even begin the transfer.
 
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