Just to make this clear, L1 cache stores memory that goes into the processor, while l2 cache stores memory that is waiting to leave the processor. They both predict what information the processor will need. They can make wrong predictions however. From the very limited knowledge that I know(veryvery very limited I'm probably wrong), the l2 cache sends its info to the RAM. Amd 64s don't need that much extra L2 because it has an integrated memory controller, so the misses(mistakes) will be replaced faster. Pentiums need that extra L2 because it does not have its memory integrated, so the information has to be sent out to the memory controller through a front side bus. The extra time it takes to make sure it's information is correct slows down the Pentium, so a larger L2 cache is needed in order for more information to be stored. The larger the L2 cache, the more correct information, so even if there is wrong information, the correct information will prevail.
So celeron ds need the cache, while semprons dont need it as much. That is why a sempron 3300 with only 128 mb cache and clocked at 2.0 will beat the 3100 with 256 cache, although only slightly. This is not the case with the Celerons. The difference between a celeron D at 2.6 and a celeron at 2.8 is way larger than the difference between the semprons.
This had no relevance to this post but whatever
. Btw, correct me if I'm wrong, I'm really interested in how it really works lol.