DRAM Burst Length (self-abbreviated DBL):
This option basically controls the amount of data that can be "burst" in one read/write. A "burst" has the advantages of only needing to invoke the CAS latency one time, allowing for less delay than a "non-burst" transaction. However, "burst" transactions can only be used for contiguous blocks of data (as only one column address is sent in the burst).
DBL: Performance Gain: % Increase:
4 to 8 0 MB/sec 0%
Our results showed no performance increase at all with changing the DRAM Burst Length, no matter what the circumstances were.