AMD sets launch date for quad-core
AMD will roll out its quad-core processors in mid-2007 and plans to release a lower-power dual-core mobile CPU and a souped-up desktop offering, company executives said Thursday.
AMD CTO Phil Hester said the quad-core processor will have four true cores, "it is not a dual-core glued together." His comments came at an analysts briefing Thursday.
The chip will have dedicated L1 and L2 cache for each core plus a shared 2Mbyte L3 cache design that Hester said can be expanded in the future.
AMD also will work to increase the number of instructions that can be processed at one time, including floating point instructions, important for graphics and high-performance computing.
I/O and memory controller speed will be scaled up to handle the increased load from four cores, he added.
Hester said AMD will also continue to focus on power management capabilities in its design. Each core can be controlled for power individually and can be powered down when loads are light.
With the new quad-core designs, Hester said AMD will have x86 offerings that can handle as many as 36-individual cores in a systems, pitting the systems up against the higher-end RISC and Itanium competitors.
John Fowler, executive vice president of Sun Microsystems' Systems Group, is close to releasing a new Opteron product line that will give a x86 systems, which typically have a shorter life cycle than higher-end RISC-based systems, a life-space of five to six years.
He said four-core, eight-core, new memory such as FB-DIMM, will be able to accommodated over time without having to change out motherboards. "It's not just about the speed of the pipeline, it's the about the building blocks of the pipeline," he said.
Marty Seyer, senior vice president of AMD's commercial business segment, said that AMD feels so confident about its momentum in the server space it is increasing its 2006 year end goal to 30 percent from 20 percent. At the end of the first quarter, AMD held 25.7 percent of the US server market and 15.3 percent of the worldwide server market, according to Gartner.
"We are resetting our target based on the momentum we have had," he said.
As first reported by CRN, AMD also disclosed plans to let system makers couple Opteron processors with coprocessors for specialized applications, such as high-performance computing, advanced security, and XML and Java applications.
These coprocessors currently can be plugged into an extra Hypertransport link or an empty socket in a dual-socket system. Hester said AMD also is exploring integrating such coprocessors onto the processor die in the future. AMD's plan is code-named Torrenza.
"We are laying the foundation today and watch technologies as they evolve in the future," he said.
Also discussed by AMD was a new dual-core, 64-nanometer mobile chip that further improves power efficiency. Hester said AMD's new processor, to be available in 2007, will control power management separately on each of the mobile dual cores as well as throttle down I/O connections as loads decrease.
In the future, he said AMD will focus on improving graphics performance on notebooks as well as working with partners to support advanced wireless such as 802.11n and 3G.
AMD's enthusiast desktop offering includes a reference design that supports two dual-core Athlon FX processors with a PC Express connection to two dual-graphic processor cards.
