Ok, I read that and just want to clarify a few things:
1) Yes I know that x86 microprocessors were neither originally built with 32 bit or 64 bit register extensions. However, saying that is like saying current x86 processors don't "natively" support updated SSE instruction sets or 3DNow! as they were never originally supported in x86 microprocessors. My intrepretation of native is a processor that is able to understand and process an instruction set without having to emulate it through yet another instruction set and as a result create an internal bottleneck. For example, Pre RevE AMD64s did not support SSE3 instruction sets and as a result had to emulate them and as a result would perform noticably slower on programs using said instruction set. If you want an example try comparing a Prescott to a Winchester core using SSE3 version of SuperPI
2) I am not saying that Intel processors using EM64T cannot use 64 bit extensions. The point I'm making is that EM64T was nothing but a response to AMD64 extensions. Intel had already previously developed their own native 64 bit processors, namely the Itanium with IA-64 support, however that core lacked IA-32 support and as a result had to emulate 32 bit code and severely choked in 32 bit environments. I'm not claiming I am a programmer or microprocessor engineer however based on what I have read on EM64T (and this was a while ago when Intel first released it, hence why I don't if it is accurate in regards to conroe), cores equipped with EM64T extensions in theory should suffer the same problem the Itanium had with IA-32 extensions.
3) Here's what you have to assume. AMD64s were built from the ground up to include full native support for all legacy bit extensions (16, 32 64) using AMD64 extensions. The Pentium 4 was not, it was a native 32 bit core that was taken back to the drawing boards and rather than try making IA-64 and IA-32 universal, they instead tried cloning AMD64 extensions (or rather, they had to as Windows x64 was being written with AMD64 extensions in mind as far as I am aware). Thus, EM64T was born and operated in a 32 bit mode internally. To compare, think of hyperthreading or reverse hyperthreading if you must. The core is able to trick the operating system into believing that the core is able to accept more than one thread at a time by duplicating the architectural state of the core. This gets hazey with me, but it seems to me that if a core is able to modify its own architectural state and manipulate software such as allowing an OS to schedule two threads to a processor that infact only has one physical core, it seems perfectly possible for it to modify the number of bit registers, bit intergers etc. present in the architectural state.
Like I say, I don't know the details nor am I up to date on this crap. I am not saying that EM64T are not 64 bit processors, I'm simply saying that they aren't designed to natively support 64 bit code IE Itanium not natively supporting IA-32. It's also not really relevent either and based on the woodcrest vs. opteron I just flipped through it looks as though I am incorrect