Rambus XDR™ DRAM technology is a total memory system solution that achieves an order of magnitude higher performance than today's standard memories while utilizing the fewest ICs. Perfect for graphics processing, consumer electronics, network, and server applications, a single, 2-byte wide, 3.2 GHz XDR DRAM component provides 6.4 GB/sec of peak bandwidth.
The XDR solution achieves its performance using several components. The XDR DRAM device is a high-speed memory IC that turbocharges standard CMOS DRAM cores with a high-speed interface capable of 3.2 and 4.0 GHz data rates with a roadmap to 4.8, 6.4, and 8.0 GHz in the future. On the controller side, the XIO (XDR I/O) cell provides the same high-speed signaling capability found on the DRAM, but adds additional enhancements like FlexPhase™ technology. The XMC (XDR memory controller) is a fully synthesizable logical memory controller that is optimized to take advantage of the technology's many special features like Dynamic Point-to-Point. System clocks are also provided using the XCG (XDR Clock Generator), which has four programmable outputs and is guaranteed to meet the clocking requirements for the XIO and XDR DRAM devices. Rambus also completely specifies the physical interconnect, which is designed to operate on standard boards and packages designed for high-volume consumer applications
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The XDR solution achieves its performance using several components. The XDR DRAM device is a high-speed memory IC that turbocharges standard CMOS DRAM cores with a high-speed interface capable of 3.2 and 4.0 GHz data rates with a roadmap to 4.8, 6.4, and 8.0 GHz in the future. On the controller side, the XIO (XDR I/O) cell provides the same high-speed signaling capability found on the DRAM, but adds additional enhancements like FlexPhase™ technology. The XMC (XDR memory controller) is a fully synthesizable logical memory controller that is optimized to take advantage of the technology's many special features like Dynamic Point-to-Point. System clocks are also provided using the XCG (XDR Clock Generator), which has four programmable outputs and is guaranteed to meet the clocking requirements for the XIO and XDR DRAM devices. Rambus also completely specifies the physical interconnect, which is designed to operate on standard boards and packages designed for high-volume consumer applications
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