I personally don't believe everything in that topic in XS as if it's written in stone considering there are a lot of loopholes in that theory, specifically as the dude mentioned the early Venice LBBLE stepping that breaks the pattern and if you are looking at Opterons I believe the earliest stepping availible was CCB1E which was later reintroduced after week50 production runs, so I can BS on that
Only numbers that are of particular importance are the week #s and the four numbers that follow the date code and those can't be decoded other than finding out that some overclock better than others, and those digits are significant because for the most part a core overclockability is going to be based much more on binning than memory controller revision, although a core revision might have influence of why they binned tighter/looser
That's all my opinion though