PCI ExpressÂ’ will be a new form factor due to hit the market and will replace the current format of PCI slot as well as the AGP slot.
Graphics cards and motherboards to support them should start shipping around the middle of the year and should be standard by the end of the year.
Insider's Guide to PCI Express
2004 looks set to be one of the most exciting years the PC industry has seen in a long time, with a number of highly anticipated, next generation technologies making their debut. Perhaps the most significant of all these new technologies will be PCI Express, the I/O standard for the next decade.
Why Do We Need a New I/O Standard?
Since its introduction a decade ago, the PCI bus has served us well as the universal I/O interconnect standard for computing platforms. However, during that time the bandwidth and transfer speeds of other core PC technologies such as processors, system memory, graphics and networking have increased in leaps and bounds, while I/O technology has by comparison stood still.
Clearly, the PCI bus has reached its performance limit, having hit the physical ceiling for a parallel bus. Graphics cards quickly outgrew the constraints of the PCI bus, which only offers 133MB/s, leading to the introduction of the higher bandwidth AGP bus. However, even the AGP bus has now reached its physical limit. Furthermore, the increasing prevalence of high-speed peripheral devices, real-time streaming content, and gigabit networking is placing additional demands on the PC's I/O bandwidth. The need for a new I/O standard is becoming increasingly clear.
About PCI Express
Formerly known as 3GIO, and overseen by the PCI Special Industry Group (PCI-SIG), the PCI Express standard is intended to consolidate and replace the existing PCI and AGP buses. Prior to defining the PCI Express standard, PCI-SIG set out the following key requirements:
· High Performance
Provide higher bandwidth with scalable width and frequency.
· I/O Simplification
Enable consolidation of I/O standards while maintaining backwards compatibility with existing PCI devices.
· Advanced Architecture
Use layered architecture to allow longevity, reliability and improved power management.
· Ease of Use
Support hot pluggable/swappable devices.
Based on a bi-directional, serial bus architecture that provides a significant bandwidth increase for graphics and peripheral connections, as well as maintaining complete software and hardware compatibility with all existing PCI devices, the new PCI Express standard effectively meets these requirements. The key advantages of the PCI Express standard can be summarized as follows:
Performance
Of all PC subsystems today, graphics processing places by far the largest demand on system bandwidth. PCI Express addresses this demand with 16 PCI Express lanes of dedicated bandwidth, providing up to 4GB/s transfer speeds - an almost 100% increase over the 2.1GB/s bandwidth offered by AGP8X. This significant boost in bandwidth is expected to take the PC into new realms of high-definition, cinematic quality graphics.
PCI Express also delivers a significant boost in bandwidth for peripheral connections, with a single PCI Express lane offering transfer speeds of up to 250MB/s, again an almost 100% increase over the existing PCI standard. Furthermore, the flexible nature of the PCI Express standard allows the implementation of four lane (1GB/s) or eight lane (2GB/s) PCI Express connections for higher-bandwidth peripheral connections.
Scalability and Headroom
The layered, point-to-point architecture of the serial bus based PCI Express standard allows PCI Express lanes to be stacked together to increase bandwidth. This offers a significant advantage over the existing PCI standard, which was confined to the limitations of its parallel bus architecture, and provides guaranteed longevity and improved flexibility. It is expected that PCI Express has the headroom to meet all our I/O needs for at least the next decade.
Simplified Design and Flexbility
In comparison with other I/O buses, PCI Express offers unparalleled levels of bandwidth per pin. With up to 100MB/s/pin bandwidth, component chips will require fewer pins and less silicon space, ultimately helping reduce component cost, or alternatively, freeing up silicon real estate for additional features.
A welcome boost for motherboard and system designers is the fact that fewer pins means smaller connector size, fewer traces and signals, and improved signal integrity. This, allied with improved power management capabilities, will help enable a new generation of high-performance, small form factor devices that don't compromise on I/O connectivity.
Comparing PCI Express™'s bandwidth per pin with other buses. Source: PCI SIG Whitepaper - Creating a PCI Express Interconnect.
Ease of Use
The PCI Express standard provides the ability to Hot Plug and Swap multiple I/O devices. Furthermore, a new generation of compact PCI Express based modules and cables is expected to help achieve the stated aim of consolidating I/O standards.
